AMD Revolutionizes AI Networking with New P4 Engine and UEC-Ready Solutions


By MYBRANDBOOK


AMD Revolutionizes AI Networking with New P4 Engine and UEC-Ready Solutions

Today in San Francisco AMD announced updated versions of its chips portfolio and moved to position itself as an across-the-board provider of data center technology for organizations implementing Big AI. The company also said it is speeding up its product release cadence, a move clearly aimed at formidable sector heavyweight Nvidia.

 

“AMD is the only company that can deliver the full set of CPU, GPU and networking solutions to address all of the needs of the modern data center,” said AMD chair and CEO Lisa Su,  adding that AMD sees the data center AI accelerator market growing to $500 billion by 2028. “And we have accelerated our roadmaps to deliver even more innovation across both our Instinct and EPYC portfolios while also working with an open ecosystem of other leaders to deliver industry-leading networking solutions.”

AMD has made significant strides in AI networking with the release of its 3rd generation P4 Engine, AMD Pensando™ Salina 400, and AMD Pensando™ Pollara 400, the world's first UEC-ready AI NIC. This combined approach, featuring a programmable DPU for the front-end and a UEC-ready backend AI network, unlocks new levels of network utilization through intelligent load balancing, congestion management, and fast failover and loss recovery.

Key Points:

  • AMD introduces 3rd generation P4 Engine and UEC-ready AI NICs.
  • New solutions enable intelligent load balancing, congestion management, and fast failover.
  • AMD partners and the Ultra Ethernet Consortium play a vital role in driving AI networking advancements.

 

AMD would like to express its gratitude to its partners, including Raj Subramaniam of Oracle Cloud, Narayan Annamalai of Microsoft Azure, Kevin Wollenweber of Cisco, Ajay Apte of IBM Cloud, Darrick Horton of TensorWave, Jeremy Foster of Cisco, and Hongyu Wu of ByteDance, for their participation in Advancing AI and their support for this crucial milestone in front and backend networking. Additionally, AMD thanks the members of the Ultra Ethernet Consortium for their collaboration in addressing the growing network demands of AI and HPC at scale.

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